The block diagram of the Komodo-Microcontroller is shown in fig. 4.1. It takes pattern of the picoJava-I(TM)-core (Sun Microsystems Inc.) with its four-staged pipeline (IF, ID, EXE, WB) and optimizations concerning stack-architecture and garbage collection.
Essential innovations are compared with the picoJava are multithreading introducing the Priority Management Unit for hardware scheduling and event handling via IST using the Signal Unit.
This microcontroller shall be capable of performing four concurrent threads, of which three are for real-time purposes. The fourth ist for general use by the operating system, garbage collection or other non-real-time tasks. Four program counters are implemented (PC0,...,PC3), so that four independant instruction windows (IW0,...,IW3) can be filled and read out controlled by status bits for e. g. priority, thread active, latency.
Decoding is controlled by the Priority Management Unit, which choses the next instruction from those windows respecting scheduling technique, latency of the last executed instruction, fill-level and status bits. For example the next instruction can be chosen by the amount of execution time specified for each thread. This means the user defines a guaranteed percentage of CPU-time to be kept over an intervall of about 100 clock cycles. One instruction is selected and decoded. This may lead to a microcoded execution or a trap-routine call as well as direct execution. The Priority Management Unit, which implements the new concept of Interrupt Service Threads (IST) instead of Interrupt Service Routines , is designed in another diploma thesis .
The decoded instruction is transmitted to the Execution Unit (EXE). It will be performed in a memory access unit or the Arithmetic-Logic Unit (ALU). Afterwards the Write Back Unit (WBU) provides the Stack Memory Unit with all the data needed for storing the result into the stack memory belonging to the thread chosen for execution.
The Signal Unit provides the infrastructure to map external events directly to the internal status bits for fast reaction in real-time environments.